Announcement

**LeetMiniWheat** · 01-31-2011, 10:59 AM

Upon further testing, I discovered that 1T vs 2T isn't as big a difference as I thought. In the Athlon64 DDR days it seemed a bigger deal. (I remember having DDR-600 running 1T stable)

Anyhow, here's my test results in AIDA64. I ran 3 tests at 1T and 3 at 2T and both with 170 tREF. (1T on left, 2T on right)

the read/write/copy seem almost the same, but the latency is different. and strangely enough, the CPU L3 cache is lower in 2T.

Guess i'm fretting over nothing since it doesn't seem to make much difference. Although, I am curious what real world difference the additional latency makes.

**genetix** · 01-31-2011, 12:52 PM

Got to say that's a weird damn timing.

tRC should be tRP+tRAS.
tRFC should be something like tCL * 20 at maximum on DDR3. It's probably so high just because of this new optimization on write speeds. So, 170-200 would be pretty minimum to keep up.
tCMD / Command Rate is usually depending on memory chip quality and controller. Should go to 1T on any condition almost, if the chip can actually take that ~24000MB/s speeds.

yet it's pretty impressive speed considering that at LGA1366 maximum write you could ever had was near 18000MB/s which was just sad. As for memtest86+ I'd say you can forget that
one. Only way currently to find out stability is if you drop core to 'sure stable multi' and then do Maximum memory linpack at windows. basically this would be ideal ground to test as this
would go through that monster speed and see does it drop an error (or to error correction which you would see on slower speed between tests).

**LeetMiniWheat** · 01-31-2011, 01:03 PM

Thanks for your thoughts,

I didn't know about write optimizations on sandys. interesting. so maybe that's why tRFC is so high. I'll have to test with some lower values.

anyways, at default 3.3GHz I get about 20000/18000/20000/41ns at 2133MHz, so it's about the same as 1366 i'd say. but my tests with roughly 24000 numbers were run at 4.6GHz which is known stable on my system with prime95 and linX/IBT 12+ hours with max memory.

but when changing from 2T to 1T, stability goes to hell with BSOD's indicating memory error, and sometimes even cpu error (indicating more Vcore) which I find very odd considering this is a known stable overclock with 2T.

I wish I knew what component was holding me back from 1T though. I suspect it's something in the CPU, but sandy's have a lot of components inside. too many variables. could be the core, memory controllers, even the cache or internal QPI or something. but I suppose it's not that big a deal now that I've seen some synthetic benchmarks. at this point I'm just making shots in the dark with different voltages, so it would help if I knew what might be the likely cause. thought maybe someone could give me some insight. (or that g.skill could share some of their QVL test data)

**LeetMiniWheat** · 01-31-2011, 01:16 PM

also, the more I read these forums the more g.skill kits I see rated for 2T. I remember most DDR3 being 1T back in 2008/2009, what has changed recently? why all the 2T suddenly?

**genetix** · 01-31-2011, 01:18 PM

You CPU clock has nothing to do with the memory speed. memory and CPU features should be located at separated clock. Unless these new systems got syncronous clocks which would be pretty cool (sorry, haven't much tested sandy yet).

It's the 'cache clock' or 'Uncore' as they used to call it. They now has this 'System Agent' voltage and the QPI VTT, but I am too afraid to try to help as I don't know where does the
voltage end, but I do know you should try to find 1 stable higher QPI VTT only and go against that as this value too high or low will not be flying. It needs the most stable highest
voltage it can be set by spec to operate at fastest speed, if there's any sense.

As for the latencies, I wouldn't worry too much on pushing latencies higher as long they have some balance because you cannot push that write higher and this will most likely introduce
error correction on the QPI links, if I have any understanding how this works and this again will introduce L3 Cache speed drop as you see it. Using 2T is REALLY different on Intel
systems against AMD systems these are really different kind of systems on Intel systems time to time 2T is much better option.

As for 'too many variables' no there's not. Do as I would do if I would own such system (Got LGA 1366 + X5650 myself with some Elpida love

) one components at the time:
* Drop CPU multi down
* Drop memory down
* Hit QPI up
* Test is it still stable
(You'll find what the board can do, use small tests something like HT disabled + hit 500 rounds of Linpack 16MB on class maybe couple rounds of 4096MB or maximum memory to see when the board drops)
* Test memory on lowest latencies you can muster (at Windows) -> The speed
(you'll find out memory speed against the QPI speeds -> this speed is absolute highest, so, 1T is will not do unless you manager to push it on this stage.)
* Finally hit the CPU up what ever you clock it
* drop QPI + Memory down as it goes
(Get CPU highests -> use tests like 500x 6-7MB and perhaps 5-6 1024MB Linpack 'these high memory tests are worthless at this point as you should be testing CPU however it's good to see is the memory sync')
* When you find all hit everything up on largest values you found on voltages you found
(Test against PI / LinPack small and large should give you highest result in most stable manner. Intel HT is another matter as you can only do Physical Core 100% + Virtual Core 65% which is problematic, so, stressing 100% on all will not fly, but it's still 100% stable as is.)

**LeetMiniWheat** · 01-31-2011, 01:32 PM

Hmm, very interesting about QPI/cache error correction. I didn't take that into account.

Originally posted by genetix View Post

You CPU clock has nothing to do with the memory speed. memory and CPU features should be located at separated clock. Unless these new systems got syncronous clocks which would be pretty cool (sorry, haven't much tested sandy yet).

L3 cache is synced with core clock.

here's my results with the same memory timings. 3.3GHz versus 4.6GHz. you can see it's quite a substantial difference. so the old methodology doesn't quite work anymore. (but I get what you're saying about using a stable baseline to test the limits of each part individually, I definitely agree!)

Anyways, I've been thoroughly testing my sandy for the past 2 weeks. max core clock is 4.9GHz, and memory seemed to do 1T initially but now only 2T. but it could just be that only recently I started doing exhausting prime95 tests. (for some reason prime95 stresses sandy bridge harder than IBT) I usually do prime95 with small FFT, but using 6144MB memory with a game like Metro2033 running simultaneously. this combination of CPU, Memory, and PCI-E stressing seems to hit all aspects of these new systems. (and my 4.6GHz settings with 2133MHz 9-11-9-28-170-2T is 15+ hours stable through these tests)

**LeetMiniWheat** · 01-31-2011, 01:37 PM

so you think 24000MB/s may be pushing the limits of the QPI links? hmm... that definitely would make sense. though I've seen some people pushing 26000, not every chip is equal.

with regards to VTT, it hasn't seemed to make a difference anymore. initially it seemed to need 1.140V to do 1T command rate, but I've scaled up and down from 1.050 (default) to 1.20V with small increments without being able to get it stable anymore. but at 2T it's fine.

though it is very hard to test since it takes 3-5 hours to get it to BSOD with 1T. this is why I'm trying to get some kind of idea of what voltage I might need to pinpoint, since QPI/VTT doesn't seem to make a difference anymore.

**genetix** · 01-31-2011, 07:47 PM

Well, I was reading on the subject a bit on WIKI and that's an DMI 2.0 'Northbridge' capable to 21,5 GB/s. It should reach all in all to some logical amount like 28000MB/s. I
still think that the tweaking of this new hardware is bad and quality of chips are like 'no more' from intel.

as for being syncronous with the core. Yeah, the 4,6Ghz sounds correct to 24500MB/s, but if this is correct and real theoretical overclocked maximum would indeed be x3 = 28000
MB/s I doubt that QPI would be blocking I actually would say memory would be the one halting the speed in these speeds or at least timing set and everything would have to be
exactly correct and core clock would have to be something really crazy like 5,1-5,3Ghz to reach it with simply calculation what the throughput is now and what it should be. I am unsure
what memory chip that is, if it has to have higher tRCD to be stable.

I don't think you should try to reach the 1T I think you should try to reach in general lower main latencies to higher speed, if your setup requires the higher tRCD or even an high latency
to insane clock to go higher.

**LeetMiniWheat** · 02-02-2011, 06:32 AM

thanks for the info, learn something new everyday!

anyways, I tried 9-10-9-27 but wasn't stable. even though it passed memtest. I also tested different tRFC values. 150 seemed to reduce memory write and copy, most notably the L3 cache copy was lower. I wonder why? but other values were slightly higher. so I think 170tRFC is a good compromise between 150 and 200 for decent copy speeds and good latency.

so this seems to be the extent of what these will do. still very pleased with them, just kinda wish I could do 1T command rate. although with higher CPU clock (4800MHz) it evens out anyways.

Announcement

Sandy Bridge + F3-17000CL9D-8GBXLD subtimings and Command Rate question

Sandy Bridge + F3-17000CL9D-8GBXLD subtimings and Command Rate question

Comment

Comment

Comment

Comment

Comment

Comment

Comment

Comment

Comment