Model of the motherboard: GA-870-UD3 Bios 5a
Model of the memory: F3-10666CL7D-4GBRH
Model of the CPU: AMD Phenom II X4 945
I want to optimize the system without overclocking or going borderline. Stability over Performance. Usually I only use Intel systems so I am slightly confused that the AMD bios doesn't read the XMP timings and uses slightly different names. So I changed some fields to XMP like values which runs fine in a short memtest session:
CAS# latency 9T => 7T
RAS to CAS R/W Delay 9T => 7T
Row Precharge Time 9T => 7T
Minimum RAS Active Time 24T => 23T
Row Cycle Time 33T => 31T
1T/2T Command Timing 2T
Are these fields the relevant ones?
Does it make sense changing the other fields too? To which values?
What are the "official" good CL7-timings?
The SPD timings:
CAS# latency 9T
RAS to CAS R/W Delay 9T
Row Precharge Time 9T
Minimum RAS Active Time 24T
1T/2T Command Timing 2T
TwTr Command Delay 5T
Trfc0 for DIMM1 110ns
Trfc2 for DIMM2 90ns (socket empty)
Trfc1 for DIMM3 110ns
Trfc3 for DIMM4 90ns (socket empty)
Write Recovery Time 10T
Precharge Time 5T
Row Cycle Time 33T
RAS to RAS Delay 4T
Bank Interleaving Enabled
Channel Interleave Enabled
thanks for your time!
Model of the memory: F3-10666CL7D-4GBRH
Model of the CPU: AMD Phenom II X4 945
I want to optimize the system without overclocking or going borderline. Stability over Performance. Usually I only use Intel systems so I am slightly confused that the AMD bios doesn't read the XMP timings and uses slightly different names. So I changed some fields to XMP like values which runs fine in a short memtest session:
CAS# latency 9T => 7T
RAS to CAS R/W Delay 9T => 7T
Row Precharge Time 9T => 7T
Minimum RAS Active Time 24T => 23T
Row Cycle Time 33T => 31T
1T/2T Command Timing 2T
Are these fields the relevant ones?
Does it make sense changing the other fields too? To which values?
What are the "official" good CL7-timings?
The SPD timings:
CAS# latency 9T
RAS to CAS R/W Delay 9T
Row Precharge Time 9T
Minimum RAS Active Time 24T
1T/2T Command Timing 2T
TwTr Command Delay 5T
Trfc0 for DIMM1 110ns
Trfc2 for DIMM2 90ns (socket empty)
Trfc1 for DIMM3 110ns
Trfc3 for DIMM4 90ns (socket empty)
Write Recovery Time 10T
Precharge Time 5T
Row Cycle Time 33T
RAS to RAS Delay 4T
Bank Interleaving Enabled
Channel Interleave Enabled
thanks for your time!
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